8086 Addressing Modes

8086 Addressing Modes

    The 8086 has 12 basic addressing modes(AM) and can be classified into 5 groups

1. 
   
   Addressing modes for accessing immediate & register data
2. 
   
   Addressing modes for accessing data in memory
3. 
   
   Addressing modes for accessing I/O ports
4. 
   
   Relative Addressing modes
5. Implied Addressing modes
   

I Addressing modes for accessing Immediate & Register data
1.Register AM
    In this mode the source operand,destination operand or both are to be contained in the 8086 register.
eg:- MOV DX,CX
       MOV CL,DL
2.Immediate AM
    In this mode a 8 or 16 bit data can be specified as part of the instruction
eg:- MOV CL,03H
       MOV DX,0502H
II Addressing modes for data in memory (Memory mode)

3.Direct AM
    In this mode the 16 bit effective address (EA) is taken directly from the displacement field of the instruction.This EA or displacement is the distance of the memory location from the current value in the data segment (DS) register in which the data are stored.
    The BIU shifts the [DS] 4 times to left & adds the EA to generate the 20 bit physical address.
eg:- MOV CX,START
MOV START,BL
START can be defined as an address by using the assembler DB(Define Byte) or DW(Define Word) pseudoinstructions.
Suppose if START=0040(16) &
[DS]=3050(16)
then 

3	0	5	0		Shift Left
	0	0	4	0	(EA)
3	0	5	4	0	20 bit physical address

 4.Register Indirect AM
    In this mode the EA is specified in either a pointer register or an index register.The pointer register can be either base register(BX) or base pointer(BP) and Index register can either be Source index(SI) or Destination index(DI) register
eg:- MOV [DI],BX
    The instruction moves the 16 bit content of BX into a memory location offset by the value of EA (EA is specified in DI) from the current contents in DS.
If [DS]=5004(16)
   [DI]=0020(16)  and
   [BX]=2456(16)
then 

5	0	0	4		Shift Left
	0	0	2	0	(EA)
5	0	0	6	0	20 bit physical address

     the contents of BX (2456) is moved into memory locations 50060(16) & 50061(16)
5.Based AM
    In this mode EA is obtained by adding a displacement (signed 8 bit or unsigned 16 bit) value to the contents of BX or BP.The segment registers used are DS & SS.
When Memory is accessed,the 20 bit physical address is computed from BX and DS.On the other hand,when the stack is accessed,the 20 bit physical address is computed from BP and SS.
eg:- MOV AL,START[BX] or MOV AL,[BX+START]
Where START=02H(8 bit displacement),BX=2000H
Now the 20 bit Physical address is computed from DS and EA

If [DS]=5004(16),then 

	2000H	BX			5	0	0	4
	02H	Displacement				2	0	0	2	EA
	2002H	EA			5	2	0	4	0	20 bit Physical Address

 Here the source operand is in based Addressing Mode.EA is obtained by adding the value of START and [BX].The 20 bit physical address is produced from DS and EA.The 8 bit content of this memory location is moved to AL register.
Therefore the contents of the memory location 52042 is moved in to AL register.
6.Indexed AM
In this mode,the EA is calculated by adding the unsigned 16 bit or signed extended 8 bit displacement and the contents of SI or DI.
eg:- MOV BH,START[SI]
moves the contents of the 20 bit address computed from the displacement START,SI and DS into BH register.The 8 bit displacement is provided by the programmer using the assembler pseudoindtruction such as EQU.For 16 bit displacement,the EU adds this to SI to determine EA.On the other hand,for 8 bit displacement the EU sign extends it to 16 bits and then adds to SI for determining EA.
7.Based Indexed AM
In this mode,the EA is computed by adding a base register(BX or BP),an index register(SI or DI),and a displacement(unsigned 16 bit or sign extended 8 bit)
eg:- MOV ALPHA[SI][BX],CL

If [BX]=0200H,[SI]=1000H,ALPHA=08H and [DS]=3000H 

	0200H	[BX]			3	0	0	0
	1000H	[SI]				1	2	0	8	EA
	08H	Displacement			3	1	2	0	8	20 bit Physical address
	1208H	EA

 Based Indexed AM provides a convinient way for a subroutine to address an array allocated on a stack.
8.String AM
This mode uses index registers.The string instructions automatically assume SI to point to the first byte or word of the source operand and DI to point to the first byte or word of the destination operand.
The segment register for the source is DS and may be overridden.The segment register for the destination must be ES and cannot be overridden.
The contents af SI and DI are automatically incremented by clearing DF (Direction Flag) to 0 by CLD instruction or automatically decremented by setting DF to 1 by STD instruction.
III Addressing Modes for accessing I/O ports
9.Direct AM
Here the port number is a 8 bit immediate operand.This allows fixed access to ports numbered 0 to 255.
eg:- OUT 05H,AL
outputs [AL] to 8 bit port 05H
10.Indirect AM
The port number is taken from DX allowing 64K 8 bit ports or 32K 16 bit ports.
eg:- IN AX,DX
If [DX]=5040,Inputs the 8 bit content of port 5040 into AL and 5041 into AH.
IV Relative Addressing Mode
11.
In this mode,the operand is specified as a signed 8 bit displacement,relative to PC(Program Counter).
eg:- JNC START
then,if carry=0,PC is loaded with current PC contents plus the 8 bit signed value of START,otherwise the next instruction is executed.
V Implied Addressing Mode
12.
Instructions using this mode have no operands.
eg:- CLC
this clears the carry flag to zero.
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Purpose

Although the main registers are "general-purpose" and can be used for anything, it was envisaged that they be used for the following purposes:

• 
  
  AX/EAX/RAX: accumulator
• 
  
  BX/EBX/RBX: base
• 
  
  CX/ECX/RCX: counter
• 
  
  DX/EDX/RDX: data/general
• 
  
  SI/ESI/RSI: "source index" for string operations.
• 
  
  DI/EDI/RDI: "destination index" for string operations.
• 
  
  SP/ESP/RSP: stack pointer for top address of the stack.
• 
  
  BP/EBP/RBP: stack base pointer for holding the address of the current stack frame.
• IP/EIP/RIP: instruction pointer. Holds the program counter, the current instruction address.
  

No particular purposes were envisaged for the other 8 registers available only in 64-bit mode.
Some instructions compile and execute more efficiently when using these registers for their designed purpose. For example, using AL as an accumulator and adding an immediate byte value to it produces the efficient add to AL opcode of 04h, whilst using the BL register produces the generic and longer add to register opcode of 80C3h.
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***While the concept of segment registers was not new at the time, as many mainframes used segment register to quickly swap to different tasks

SEGMENT REGISTERS

Within the 1 MB of memory space the 8086/88 defines four 64K-byte memory blocks called the code segment, stack segment, data segment, and extra segment. Each of these blocks of memory is used differently by the processor.

The code segment holds the program instruction codes. The data segment stores data for the program. The extra segment is an extra data segment (often used for shared data). The stack segment is used to store interrupt and subroutine return addresses.

You should realize that the concept of the segmented memory is a unique one. Older-generation microprocessors such as the 8-bit 8086 or Z-80 could access only one 64K-byte segment. This mean that the programs instruction, data and subroutine stack all had to share the same memory. This limited the amount of memory available for the program itself and led to disaster if the stack should happen to overwrite the data or program areas.

The four segment registers (CS, DS, ES, and SS) are used to "point" at location 0 (the base address) of each segment. This is a little "tricky" because the segment registers are only 16 bits wide, but the memory address is 20 bits wide. The BIU takes care of this problem by appending four 0's to the low-order bits of the segment register. In effect, this multiplies the segment register contents by 16.

The point to note is that the beginning segment address is not arbitrary -it must begin at an address divisible by 16. Another way if saying this is that the low-order hex digit must be 0.

Also note that the four segments need not be defined separately. Indeed, it is allowable for all four segments to completely overlap (CS = DS = ES = SS).

Memory locations not defined to be within one of the current segments cannot be accessed by the 8086/88 without first redefining one of the segment registers to include that location. Thus at any given instant a maximum of 256 K (64K * 4) bytes of memory can be utilized. As we will see, the contents of the segment registers can only be specified via S/W. As you might imagine, instructions to load these registers should be among the first given in any 8086/88 program.

**In computer technology, an opcode (operation code) is the portion of a machine language instruction that specifies the operation to be performed.

**Data declaration directives:

DB - stays for Define Byte.DW - stays for Define Word.

1. 
   
   DB - The DB directive is used to declare a BYTE - A BYTE is made up of 8 bits
   Declaration examples:
   Byte1   DB  10h
   Byte2   DB  255     ;0FFh, the maximum possible for a BYTE
   CRLF     DB  0Dh, 0Ah, 24h     ;Carriage Return, Line Feed, DOS string terminator BYTEs
   
   
2. 
   
   DW - The DW directive is used to declare a WORD - A WORD is made up of 16 bits (2 BYTEs)
   Declaration examples:
   Word1    DW  1234h
   Word2    DW  65535     ;0FFFFh, the maximum possible for a WORD
   
   
3. 
   
   DD - The DD directive is used to declare a DWORD - A DWORD (doubleword) is made up of 32 bits (2 WORDs or 4 BYTEs)
   Declaration examples:
   
   Dword1    DW  12345678h
   Dword2    DW  4294967295     ;0FFFFFFFFh, the maximum possible for a DWORD

**There is LEA (Load Effective Address) instruction and alternative OFFSET operator. Both OFFSET and LEA can be used to get the offset address of the variable.LEA is more powerful because it also allows you to get the address of an indexed variables. Getting the address of the variable can be very useful in some situations, for example when you need to pass parameters to a procedure.

**The OFFSET operator is used to tell this assembler to use the offset of msg from the start

of the code segment instead of loading bx with the first word in the buffer.